Senior Packaging Research and Development Engineer
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Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience.
- 6 years of experience working in a Research and Development packaging technical environment.
- 5 years of experience in Micro Electro Mechanical Systems (MEMS)/semiconductors advanced packaging including design, development, and testing.
- 5 years of experience in characterization of reliability and yield of advanced electronics packaging hardware.
- 5 years of experience in package techniques including 3D integration, wire bonding, bump bonding, land grid array, through-silicon vias, electrical contacts, micro machining.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field (e.g., Optics, Sensors, Audio/DSP).
- Experience building and managing vendor supply chain.
- Experience with superconducting circuits or quantum computing hardware such as superconducting qubits, spin qubits, or trapped ions.
- Experience with microwave devices such as transmission lines, waveguides, resonators or antennas.
- Experience with cryogenic vacuum environments, thermal cycling and related challenges.
- Experience guiding high-precision research and development packaging development efforts and projects.
About the job
As a Senior Packaging Research and Development Engineer, you will solve the team’s packaging challenges. In this role, you will be responsible for developing advanced packaging interconnect technologies for packaging cryogenic microwave devices. You will collaborate with researchers and engineers on the Quantum AI team, as well as academic and industrial partners externally, to develop the packaging and integration technologies used in our next generations of quantum computers. This role requires a person who can manage multiple projects simultaneously, spanning 3D silicon, PCB, and MEMS packaging and interconnect technologies.
In this role, you will leverage your advanced packaging and integration experience to advance our packaging technologies for higher signal density, improved signal integrity, and to provide a high quality quantum processor environment. You will bring curiosity and engineering intuition to develop the understanding needed to improve superconducting quantum hardware system performance, and to pave the way for rapidly increasing the number of qubits in accordance with our roadmap.
The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.
The US base salary range for this full-time position is $174,000-$258,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Collaborate with academic and industrial partners as a project technical lead for technology development.
- Write documentation and transfer newly developed processes to in-house or external production.
- Scope and purchase tools needed for process development of microwave interconnect technologies, develop processes, and determine the capabilities and limits of newly developed processes.
- Write and execute test plans e.g., to assess packaging performance, achievable pitch, density, electrical, mechanical, thermal performance, and yield, reliability.
- Perform research and development of PCB and silicon/3D/MEMS based advanced packaging and interconnect technologies for integrating cryogenic microwave devices and quantum processor components.
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