Central Processing Unit Physical Design Implementation Engineer, Silicon
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- 3 years of experience in physical design.
- Experience in one or more sign-off convergence in Static timing analysis (STA) electrical checks and physical verification domains.
- Expertise in high-performance, low-power physical design and implementation techniques with industry standard implementation and signoff tools.
Preferred qualifications:
- 3 years of industry experience with high-performance CPUs.
- Experience in using Static Timing Analysis (STA), power grid network delivery, and power analysis tools.
- Knowledge of Central Processing Unit (CPU) including critical iterations for timing and low power microarchitecture and implementation techniques for CPUs.
- Knowledge of computer architecture, logic design, RTL and Knowledge of Verilog/SystemVerilog.
About the job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Develop RTL2GDS Physical Design tools and flows for advanced CPU designs to achieve Performance, Power, Area (PPA).
- Collaborate with the Register-Transfer Level (RTL) Design teams on micro-architectural critical items for timing and power convergence.
- Manage block and hierarchical design physical implementation and Quality of Result (QoR) (e.g., power, timing, area).
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