CPU Performance Modeling Engineer, Google Cloud
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
- Experience in performance modeling, performance analysis, and workload characterization.
- Experience working with general-purpose programming languages (i.e. C++).
Preferred qualifications:
- Master’s degree or PhD in Engineering, Computer Science or other technical related field.
- Experience in modern, high-performance CPU/ML architecture and micro-architecture.
- Ability and interest to learn other coding languages as needed.
- Excellent object-oriented, database design, and SQL skills.
About the job
In this role, you will work with system teams and the CPU Architecture team to develop an understanding of the CPU, SoC, performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model CPU performance at different accuracy levels by supporting architectural explorations and decision-making. In addition, you will correlate performance projections with measured post-silicon data.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
- Be part of a team to verify complex digital design blocks at subsystem level or full chip level by fully understanding the design specification and interacting with design engineers to identify key verification scenarios.
- Create and enhance constrained-random verification environments using UVM SystemVerilog or create complex multi core based C tests using reusable C test libs.
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
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