Silicon SoC Low Power Engineer, Google Cloud
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in Application-specific integrated circuit (ASIC) development, with Power optimization.
- Experience with Low Power schemes, power roll up and power estimations.
- Experience in ASIC design verification, synthesis, timing analysis.
Preferred qualifications:
- Experience with coding languages (e.g., Python or Perl).
- Experience in System on a Chip (SoC) designs and integration flows.
- Experience with power optimization and Power modeling tools.
- Knowledge of high performance and low power design techniques.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate machine learning computation in data centers. You will collaborate with members of architecture, verification, power and performance, physical design etc. to specify and deliver quality designs for next generation data center accelerators. You will solve problems with micro-architecture and practical reasoning solutions, and evaluate design options with performance, power and area in mind.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Participate in defining Power management schemes and Low Power modes.
- Create power specifications and Unified Power Format (UPF) definition for System on a Chip (SoC) and Subsystems.
- Estimate and track through all phases of the project.
- Run Power optimization tools, suggest ways to improve power and drive convergence.
- Work with cross-functional teams for handoff of power intent and power projections.
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